(1) Field of the Invention
The present invention relates to an Emitter Coupled Logic circuit (hereinafter referred to as an "ECL circuit") of a master-slice type and, more particularly, to an emitter follower circuit formed in such master-slice type ECL circuit.
(2) Description of the Related Art
In a conventional master-slice type ECL circuit of the type to which the present invention relates, where a logic circuit for taking a logical AND operation on output signals S1, S2 of two inverters 1a, 2a as shown in FIG. 1A is to be formed, the circuit configuration used is as shown in FIG. 1B. That is, since the levels of the input signals Si1, Si2 applied to input terminals TI1. TI2 of the inverter circuits 1a, 2a are the same as the level of the output signal S0 of a two-input AND circuit 4a, the signal S2 to be inputted to an ECL circuit 42 which is arranged at a side of a lower potential terminal within the two-input AND circuit 4a is supplied through a level shifting circuit 44 arranged at a top stage of the AND circuit 4a. The same is true for a third stage of a three-input AND circuit having three ECL circuit stages arranged in a staked relation. These are disclosed as ECL gate array internal circuits, for example, in "The Aspect Gate Array Design Manual" 10-2, 10-3, 10-4, 1988 of the National Semiconductor Corporation, and also disclosed as ECL gate array internal circuits, for example, in the "Macrocell Arrays MCA2500ECL Design Manual" (pages 5-6), 1985 of Motorola, Inc.
In the above conventional master-slice type ECL circuit, where the logic circuit is to be formed by two or more stacked stages of ECL circuits, it is necessary to provide a potential difference in the order of a forward voltage of one diode in each of the logic levels in each of the logic circuits and, in order to maintain the input signal level of the ECL circuit and the output signal level thereof at the same level, the logic input signal(s) to be inputted to a given stage(s) of the multi-stage differential logic section within the logic circuit is(are) level-shifted through a level shift circuit(s). This means that the power consumed is large which results in an increase in the power consumption in the overall ECL circuit. This is a problem to be solved.